SoC Root Canal!

Finding the root cause of power-based side-channel leakage becomes harder when multiple layers design abstraction are involved. While originates in processor hardware, dangerous consequences may only become apparent cryptographic software that runs on processor. This contribution presents RootCanal, a methodology to explain origin program terms underlying micro-architecture and system architecture. We simulate hardware power consumption at gate level perform non-specific test identify logic gates contribute most sidechannel leakage. Then, we back-annotate those findings related activities software. The resulting analysis can automatically point out non-trivial causes leakages. To illustrate RootCanal’s capabilities, discuss collection case studies.